The dielectric breakdown field of silicon carbide (SiC) is about 10 times higher than that of silicon (Si). Therefore, silicon carbide is a material which enables a drift layer, which maintains a breakdown voltage, to be thin and have a high concentration. Therefore, SiC power devices are expected to realize loss reduction compared to Si devices in the higher voltage application. One of them is a junction field effect transistor (hereinafter, simply called “junction FET”). The junction FET is a device which turns on/off a current by controlling the expansion of a depletion layer between a p-type region of a gate and an n-region of a channel for current flow by a gate voltage.
In the case of a normally-off type junction FET, when a gate voltage is not applied (0 V), no current flows, and a blocking state is obtained; when a positive gate voltage is applied, an on-state in which a current flows is obtained. In such a normally-off type junction FET, since the gate voltage at which the on-state is obtained (hereinafter, threshold voltage) has to be set to be smaller than or equal to the diffusion potential of the pn-junction, the threshold voltage is about 2.5 V at most. Since the threshold voltage is the gate voltage at which the channel begins opening, almost no current flows at the point of the threshold voltage. Therefore, usually, the threshold voltage is designed to be about 1 to 1.5 V.
For example, Japanese Patent Application Laid-Open No. 2009-021461 (Patent Document 1) discloses a semiconductor device technique in which diodes are connected to a gate terminal of a junction FET. As a result, built-in voltages of the connected diodes can be added to the threshold voltage of the single junction FET, thereby practically increasing the threshold voltage.